Precise motion control helps shrink lithography to 32 nm
By Control Engineering Staff -- Control Engineering, 3/4/2008
Albany, NY, and Jena, Germany – As a boost to advance lithography, Sematech
Offering perspective on how small that is, in a prior September 2007 announcement, Intel showed the first working chips at the 32 nm size
The companies call the final system design release a milestone for the PROVE project, said to permit production of more advanced photomasks with improved image placement accuracy. Double patterning lithography requires tighter image placement control for photomasks; the system will enhance photomask production in general.
A key component of PROVE is the diffraction-limited, high resolution imaging optics operating at 193 nm, corresponding to at-wavelength metrology for the majority of current and future applications. Another benefit is reasonable working distance, which allows through-pellicle measurements. Two illumination paths offer measurements in transmission and reflection, providing flexible illumination for maximum contrast imaging. The photomask resides on an ultra-precise stage, the only movable part in the imaging path. The project is expected to reach 32 nm high performance by the end of 2009.
PROVE was developed by a team of more than 40 Carl Zeiss SMT engineers and supported by Sematech to ascertain accuracy of mask pattern alignment and registration for 32 nm half-pitch and beyond photomasks. Double patterning is a technology for enhancing feature density by using standard 193 nm wavelength technology. The metrology technology forms part of the critical infrastructure of extreme ultraviolet (EUV) lithography. The tool is targeted for production in 2009, with mask manufacturers as primary customers.
“Future lithographic scaling places a high reliance on very tight overlay control of the various device layers, and the photomask is a key component of the overlay error budget,” said Michael Lercel, Sematech director of lithography and chairman of ITRS Litho Working Group. “This new system will get us past several previously ‘no known solution’ challenges.”
According to Oliver Kienzle, a member of the board of Carl Zeiss SMT’s Semiconductor Metrology Systems Division, ”Exploiting the core competencies of Carl Zeiss SMT and our long-term experience in 193 nm lithography optics and metrology enabled us to create a revolutionary new system design which will close the technology gap for overlay metrology at 32 nm and beyond. Additionally, the broad presence of Zeiss products within the mask industry will be most beneficial for our customers in providing them an increased on-site applications and service support.”
“With double patterning coming on strong as an optical extension, registration tolerances are getting even smaller,” said Patricia Gabella, Sematech project engineer and manager of the joint project. “Working with Carl Zeiss SMT, we have completed a design for quantifying image placement errors as small as 2.4 nm according to the ITRS roadmap. This is a major milestone towards making double patterning a commercially viable technology.”
Carl Zeiss was chosen to develop the system in April 2007 by an evaluation team of mask makers and Sematech member companies, reviewing proposals from several suppliers. Zeiss’ proposal included a design allowing mask manufacturers to measure position deviation of photomask features precisely and accurately. Engineers from both companies partnered to develop the concept. The mask pattern placement metrology tool project builds upon a successful partnership between the companies on the immersion AIMS tool.
– Control Engineering News Desk
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