Advancing Technology: Energy-efficient microchips
Semiconductor industry technology continues to advance despite the current market downturn. Chip energy-efficiency is a major area of development. Energy savings at the micro-scale can be substantial when spread over a vast number of chips. See photos, related links.
On the 6th anniversary of the AMD Opteron processor, AMD announced what it calls its most energy efficient server processor to date—the Quad-Core AMD Opteron EE processor.
Fortunately for the semiconductor industry, its technology continues to advance despite the current market downturn. Chip energy-efficiency is a major area of development. Energy savings at the micro-scale can be substantial when spread over a vast number of chips, albeit less evident than in larger-scale products. Controllers using such chips can be embedded in myriad applications, leading to the question, “
” The answer of late seems to be an energy efficient one.
Transistor efficiency improvements come from hardware (silicon) design, new chip materials, and software enhancements. Savings are realized in one of two ways: 1) less energy consumed from lower current flows enabled by efficient processor circuits or 2) ability to add more functions with little or no increase in power usage and heat generation. For example, Intel Corp . uses cost/benefit analysis to justify adding functions to its newest, energy-efficient chips.
One recent design trend to raise chip productivity and efficiency is to place multiple, independent execution cores on a single silicon die—but without increasing overall processor package size. These multi-core processors (MCPs) permit more flexible, hence inherently more efficient, power distribution over the chip’s sections (see further reading).
‘ Transistor efficiency improvements come from silicon design, new chip materials, and software enhancements. ’
Advanced Micro Devices (AMD) , IBM , Intel, and Sun Microsystems are among suppliers of MCPs. Newest offerings include Intel’s Xeon processor 5500 series and AMD’s several models of Opteron HE energy-efficient chips. Manufactured using advanced 45-nanometer (nm) process technology, these MCPs feature four cores which deliver improved energy-efficiency. Newer chip architectures also streamline data communication paths that reside all within the processor. AMD claims that server platforms based on Opteron HE processors offer up to 20% lower idle power compared to similarly configured competing systems.
New materials, software
Still, ever-shrinking chip dimensions pose power-wasting current leakage. A major leakage source is the chip’s on/off mechanism—or gate circuit—whose insulation layer has been progressively thinned to raise gate capacitance, required for higher chip performance. One solution is to replace traditional silicon dioxide as the gate insulator with so-called high-k (high dielectric constant) materials, which can be relatively thicker to stop current leakage and still deliver the capacitance needed.
The element hafnium has shown promise to significantly reduce leakage current as part of high-k dielectrics. Intel has introduced hafnium-based transistors combined with metal gates in its 45-nm microchip production. The company claims “a 20% boost in transistor performance” due to the new materials. IBM and its joint development partners are also working with hafnium for chip gates.
Software design can also reduce chip power consumption through more efficient algorithms. Intel’s Xeon processor 5500 series includes “simultaneous multithreading” (SMT), a method that allows two threads to execute per processor core for more energy-efficient performance. SMT offers further benefits as the number of cores per processor increases. Intel attributes substantial processor performance improvement to SMT, depending on the application.
‘ Ever-shrinking chip dimensions pose power-wasting current leakage. ’
Sun Microsystems adds that particularly when the number of threads becomes large, say 32 or more, the chip’s operating system can deactivate a thread if it encounters an idle process loop. Here’s where thread-scheduling algorithms can become key to efficient spreading of computational loads over different cores.
The latest semiconductors typically see first service in data-intensive computer applications, but savvy designers and developers will be on the lookout for early usage in industrial control systems.
Further reading: Advancing Technology, CE , May `07:
Frank J. Bartos , P.E., is a Control Engineering www.controleng.com consulting editor.
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– Edited by Mark T. Hoske, editor in chief; Register here .