Epson introduces intelligent network controller with TCP/IP


San Jose, Calif.— Epson Electronics America (EEA) announced July 10 an intelligent, single-chip network controller, S1S60000, that allows designers of home networking and security, factory automation, consumer electronics, network games and small-office equipment to easily and inexpensively add network functionality to their products. By integrating the TCP/IP protocol stack, S1S60000 reduces system development time and overall system cost for designers. Epson is a subsidiary of Japan-based Seiko Epson Corp.

The built-in, royalty-free protocol stack, which supports ARP, ICMP, IP, TCP, UDP, HTTP, DHCP, TFTP and SNMP, eliminates the requirement of developing an operating system or protocol stack, which helps manufacturers meet stricter time-to-market requirements. Savings are also achieved because S1S60000 eliminates the need for a 32-bit CPU and additional RAM.

Operating on a 3.3-V or 5-V input, S1S60000 is directly connectable to other MPUs, including Intel's x86 series, Motorola's 68xx series, Hitachi's SH line and others. Because protocols required for TCP/IP connectivity are processed internally in S1S60000's chip, only simple commands and data need to be sent from the host MPU to enable communications. Consequently, S1S60000 allows products with 8- or 16-bit MPUs to be easily changed into network-connectable devices without any advanced operating system or commercial protocol stack.

The chip's standard design provides Ethernet 10Base-T and 100Base-TX connectivity, the most widely used networking technologies. Support of emerging networking technologies that make use of phone lines or power cables is also possible via the MII PHY interface.

'There are huge cost and time savings inherent with S1S60000 that are simply not available with other conventional solutions on the market today,' says George Napier, Epson's Integrated Circuits business unit gm. 'By providing all the protocol stack functions, a simple host command system, a media independent PHY interface, S1S60000 simplifies connecting household and industrial appliances to a network.'

S1S60000 also features Epson's low-power C33 32-bit reduced instruction-set computing (RISC) microprocessor core and 1 Mbit of built-in Flash. A programmable 16-pin I/O and I2C pins provide for simple hardware control, which is possible without a host microprocessor unit.

Control Engineering Daily News Desk

Jim Montague, news editor

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