New HDL code generation capabilities simplify programming for ASICs and FPGAs

MathWorks adds HDL code generating and verification capabilities to Matlab and Simulink to simplify development work for system designers.

03/02/2012


HDL Workflow Advisor for Matlab provides options to customize and optimize HDL code and the ability to automatically program FPGAs directly from Matlab. One key feature includes automatic conversion of floating-point math functions to fixed-point.MathWorks has announced HDL Coder, which automatically generates HDL code from Matlab, allowing engineers to implement FPGA (field-programmable gate array) and ASIC (application-specific integrated circuit) designs from that language. MathWorks also announced HDL Verifier, which includes FPGA hardware-in-the-loop capabilities for testing FPGA and ASIC designs. With these two products, MathWorks now provides HDL code generation and verification across Matlab and Simulink.

“Engineers everywhere use Matlab and Simulink to design systems and algorithms,” said Tom Erkkinen, embedded applications and certification manager, MathWorks. “Now, with HDL Coder and HDL Verifier, they no longer have to manually write HDL code or test benches to develop FPGA and ASIC designs.”

HDL Coder generates portable, synthesizable VHDL and Verilog code from Matlab functions and Simulink models that can be used for FPGA programming or ASIC prototyping and design. As a result, engineering teams can now identify the best algorithm for hardware implementation. Traceability between Simulink models and generated HDL code also supports the development of high-integrity applications that adhere to DO-254 and other standards.

“HDL Coder offers integration with Xilinx ISE design suite, creating a pushbutton workflow that makes it easy for algorithm developers who use MathWorks products to target Xilinx FPGAs,” said Vin Ratford, Sr. vice president of worldwide marketing and business development for Xilinx. “This integration also provides our mutual customers access to a broad portfolio of Xilinx optimized IP from within HDL Coder that further accelerates their productivity.”

HDL Verifier now supports FPGA hardware-in-the-loop verification for Altera and Xilinx FPGA boards. HDL Verifier provides co-simulation interfaces that link Matlab and Simulink with Cadence Incisive, Mentor Graphics ModelSim, and Questa HDL simulators. With these capabilities, engineers can rapidly verify that their HDL implementation matches their Matlab algorithms and Simulink system specifications.

“As adoption of FPGAs continues to grow across industries, designers need a way to bridge the verification gap from system models to FPGA design,” said Vince Hu, vice president of product and corporate marketing at Altera. “HDL Verifier links system models to FPGA designs and enables engineers to perform FPGA hardware-in-the-loop verification with Altera FPGAs and Simulink. This workflow shortens verification cycles and helps engineers gain greater confidence in their silicon implementations.”

www.altera.com

www.mathworks.com

www.xilinx.com

Edited by Peter Welander, pwelander@cfemedia.com

Read more about FPGA applications.



The Engineers' Choice Awards highlight some of the best new control, instrumentation and automation products as chosen by...
The System Integrator Giants program lists the top 100 system integrators among companies listed in CFE Media's Global System Integrator Database.
Each year, a panel of Control Engineering and Plant Engineering editors and industry expert judges select the System Integrator of the Year Award winners in three categories.
This eGuide illustrates solutions, applications and benefits of machine vision systems.
Learn how to increase device reliability in harsh environments and decrease unplanned system downtime.
This eGuide contains a series of articles and videos that considers theoretical and practical; immediate needs and a look into the future.
Women in engineering; Engineering Leaders Under 40; PID benefits and drawbacks; Ladder logic; Cloud computing
Robotic integration and cloud connections; SCADA and cybersecurity; Motor efficiency standards; Open- and closed-loop control; Augmented reality
Controller programming; Safety networks; Enclosure design; Power quality; Safety integrity levels; Increasing process efficiency
This article collection contains several articles on how advancements in vision system designs, computing power, algorithms, optics, and communications are making machine vision more cost effective than ever before.
Featured articles highlight technologies that enable the Industrial Internet of Things, IIoT-related products and strategies to get data more easily to the user.
This digital report will explore several aspects of how IIoT will transform manufacturing in the coming years.

Find and connect with the most suitable service provider for your unique application. Start searching the Global System Integrator Database Now!

Cloud, mobility, and remote operations; SCADA and contextual mobility; Custom UPS empowering a secure pipeline
Infrastructure for natural gas expansion; Artificial lift methods; Disruptive technology and fugitive gas emissions
Mobility as the means to offshore innovation; Preventing another Deepwater Horizon; ROVs as subsea robots; SCADA and the radio spectrum
Automation Engineer; Wood Group
System Integrator; Cross Integrated Systems Group
Jose S. Vasquez, Jr.
Fire & Life Safety Engineer; Technip USA Inc.
This course focuses on climate analysis, appropriateness of cooling system selection, and combining cooling systems.
This course will help identify and reveal electrical hazards and identify the solutions to implementing and maintaining a safe work environment.
This course explains how maintaining power and communication systems through emergency power-generation systems is critical.
click me