STMicoelectronics' flash chip speeds read, write functions

Geneva, Switzerland-STMicroelectronics unveiled Nov. 26 its M58CR064, a high-performance 64-Mbps flash memory chip.

11/27/2001


Geneva, Switzerland- STMicroelectronics unveiled Nov. 26 its M58CR064, a high-performance 64-Mbps flash memory chip. It is organized as 4 Mbps x 16 Mbps, and operates at 1.8 V.

The company states that M58CR064's many features include burst mode, dual bank, fast read and programming operations, and block-level erasing and locking. These reportedly make it well suited for wireless handsets and other portable applications. M58CR064 allows asynchronous and synchronous read operations. In synchronous burst mode, data can be read on every cycle of a 54-MHz clock. M58CR064 is available with random access times of 85 or 100 nanoseconds.

STMicroelectronics adds that some of M58CR064's most noteworthy features are those for shortening programming time. These include the chip's ability to simultaneously program either two or four adjacent 16-bit words in any one bank. In addition, the chip has a separate programming voltage pin that connects a 12-V source to further speed programming. Typical programming time for the M58CR064 is 10 microseconds per word.

In addition, while M58CR064 operates from a 1.8-V power supply, it can accept to drive the I/O pin between 1.65 and 3.3 V, which allows connections to 3-V host processors. Also, as a dual bank device-one bank contains 48 Mbps and the other contains 16 Mbps-M58CR064 can program or erase data in one bank while reading data in the other.

In all, M58CR064 contains 135 blocks consisting of 127 main blocks of 512 Kbps each, as well as eight parameter blocks with 64 Kbps each. M58CR064 is available with parameter blocks located at either the top (M58CR064C) or bottom (M58CR064D) of the memory address space. Each block can sustain over 100,000 program/erase cycles.

Thanks to an individual block-locking scheme, any block can be locked or unlocked with no latency, affording instantaneous protection of code and data. In addition, all blocks are locked during power up and when the programming voltage pin falls below a certain level.





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