Efficiency: Silicon-on-insulator wafers enable lower-power devices
Bernin, France —
, said to be the world’s leading supplier of silicon-on-insulator (SOI) wafers and other engineered substrates, has taken a number of steps to increasing SOI adoption to “enable new devices that are more environmentally friendly, consume less energy and have longer battery lives.”
With power concerns becoming more critical, companies that have traditionally looked at SOI as a high-speed logic technology are now increasingly considering adoption due to its energy consumption advantages, not just speed, over bulk silicon, Soitec says.
–Participating in and supporting closer industry cooperation, and new designer innovations.
–Constructing its new Soitec Pasir-Ris 1 SOI fab in Singapore on schedule to meet future SOI demand.
–Leveraging its proprietary Smart Cut technology to engineer new substrate solutions, such as SOI wafers, the first high-volume application for the technology.
–Producing more than 80% of the world’s SOI wafers.
The industry, according to Soitec, is:
–Shifting to SOI, which now accounts for more than a third of the 300-mm logic market –Developing breakthrough embedded memory technologies using SOI, with cost efficiency of up to 40%. UMC had a successful tape out of a test chip based on its new 65-nm SOI process using ARM SOI libraries. Thatsuccessful tape out means fabless design companies can now begin SOI pilot projects, Soitec says.
–Enabling new generations of advanced low-power, high-performance devices.
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—Edited by Mark T. Hoske, editor in chief, Control Engineering News Desk
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