Embedded computer: New small form factor specification

The Small Form Factor Special Interest Group (SFF-SIG), led by embedded computer integrator WinSystems, announced an interconnect specification.
By Control Engineering Staff April 16, 2008

San Jose, CA The

Small Form Factor Special Interest Group

(SFF-SIG), led by embedded computer integrator WinSystems, announced an interconnect specification the group hopes will reduce the bite inter-module connections will take out of available board area for small form factor computer specifications, such as Express104 and Pico-ITX, now and well into the future.

The interface, named Sumit (pronounced “sum-it”) is an electromechanical connectorization specification using two, 52-pin high-density (0.025-in. pitch) connectors with center ground blades for impedance, electromagnetic interference (EMI), and dc ground return purposes.
Each connector is optional depending on the target applications of a particular computer. The Sumit Type A connector contains one PCI Express x1 (“by one”) lane, three USB ports with a global over-current signal, Low Pin Count (LPC) bus for expansion serial ports and other legacy I/O, SPI / uWire (“Microwire”), and a general-purpose I
The multitude of low speed buses will enable a smooth transition away from the long-standing ISA Bus for much of the embedded market that uses simple I/O for switching on relays or low-rate data acquisition, for example. The Sumit Type B connector adds another PCI Express x1 lane and a x4 (“by four”) lane, primarily for storage / RAID, networking, video output or frame grabbers, high-speed acquisition, and scientific applications. There are three valid configurations known as Sumit-A, Sumit-B, and for both connectors, Sumit-AB. Form factor details are distinct from the Sumit connector and pinout details, and are therefore left to those respective specifications.
“Embedded system designers are asking for simple, modular ways to embrace emerging high-speed I/O, yet without sacrificing connectivity to serial ports, A/D, and GPIOs,” said Bob Burckle, vice president, WinSystems . “Hanging multiple bus bridges, translators, and FPGAs off of a PCI Express lane to get to low-speed I/O is cumbersome, adding unnecessary risk, cost, power consumption, design and debug time, and board space usage.”
“The Small Form Factor area of the market appears to be one of the fastest growing segments, as evidenced by recent announcements,” said Colin McCracken, president, SFF-SIG. “The SFF-SIG provides an incubator organization structure under which specification sponsors can easily form a working group and develop solutions to their portions of this rapidly-evolving segment, with full access to broad inputs and reviews from the SIG’s diverse global membership. This is the optimum solution to a fragmented space.”
The news was discussed at the Embedded Systems Conference this week.
Control Engineering provides other embedded system news .

C.G. Masi , senior editor
Control Engineering News Desk
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