Hardware in the loop, FPGAs help motor testing
Organizations that test embedded software in multiple simulated and physical configurations can stay ahead of competition, and those tools are helping the automotive industry stay competitive as it tests performance of motors and controllers for hybrid vehicles. Field programmable point gate array (FPGA) technology can benefit the majority of test applications. Some experts are now using increased FPGA performance, which is achieved through co-locating input and output (I/O) and processing nodes within hardware-in-the-loop (HIL) testing.
Electric motor testing
As an example, Subaru set out to develop a new verification system for its first production model hybrid vehicle, Subaru XV Crosstrek Hybrid, by creating strenuous test conditions that are difficult to achieve using real machines. Specifically, the automotive manufacturer was interested in testing its hybrid electric motor at all stages of the systems engineering V model. While performing HIL testing of an electric motor controller, Subaru’s test engineers faced a speed challenge. The fast digital outputs of the controller meant that the HIL simulator needed to run at loop rates around 1 microsecond. A CPU-based simulation platform commonly performs at rates between 5 µs and 50 µs.
By using a test system with FPGA processors and I/O and graphical programming software, Subaru reduced test time to 1/20 of the estimated time for equivalent testing on a dynamometer. In addition, the manufacturer was able to leverage the FPGA’s high-capacity, built-in dynamic RAM to use a commercially available model and represent the highly nonlinear characteristics of the motor. In the end, Subaru built a verification system that makes automatic execution of all of the test patterns possible and replicates the most severe testing environments to ensure the highest level of safety to the user, while meeting required control rates and critical timelines.
Easy reconfiguration, regression testing
Although not all applications require such fast loop rates, FPGAs also can provide custom I/O, increased flexibility, and co-processing to any HIL test team. With the ability to reconfigure the FPGA through graphical programming, systems engineers can define I/O to be most efficient for a particular application and adapt software code to changes in unit under test (UUT) interfaces without exchanging test hardware. This is especially beneficial as FPGAs can run in parallel to a real-time processor.
Flexibility like this means models can run deterministically on the processor while offloading signal processing or high-speed signal generation to the FPGA, which increases the capability of the overall system.
Ultimately, this can lead to regression testing earlier and more often to realize increased software quality and lower overall development cost.
– Kyle Perkuhn is product marketing engineer for VeriStand at National Instruments; edited by Mark T. Hoske, content manager, Control Engineering, email@example.com.
www.controleng.com/archives for December has more information in the online version of this article, including information about hardware and software used for hardware in the loop (HIL) testing and more about software engineering using a V-model diagram.
- Hardware in the loop, field programmable gate arrays (FPGAs) help motor testing.
- Devices can advance hardware-in-the-loop (HIL) capabilities for simulation and testing, moving from idea to production more quickly.
- Subaru reduced electric motor and controller test time to 1/20 of the estimated time for equivalent testing on a dynamometer.
How much time could you remove from your design process, catching errors earlier, with a configurable testing platform?
NI provides more information about Subaru’s implementation of NI FPGA technology for HIL testing.
See related information below from Control Engineering about real-time testing software and an article about software, engineering, and the V model diagram.