Making HART communicate

HART-enabled process instrumentation is everywhere, but how does it communicate? New chip designs support this time-tested protocol.
By Tracey Johnson December 6, 2012

The need to measure, control, and communicate with machinery and process equipment has been around since the earliest days of the industrial revolution. Since then, plant instrumentation has become the backbone of modern manufacturing plants. Such instrumentation has matured from purely analog systems to the “smart” systems used today, augmenting communications capability by protocols such as HART (highway addressable remote transducer). Simply put, dc and low-frequency current signals are modulated by independent, higher-frequency signals that switch between a pair of frequencies—a technique known as frequency-shift keying (FSK), illustrated in Figure 1.

Figure 1: While the analog process variable only moves from device to host, HART communication is bi-directional. Illustrations courtesy Analog Devices

What is HART?

The primary form of communication used in analog transmitters is a current loop with a normal range of 4-20 mA, employing a transmitter, receiver, and power supply. It enables features such as remote calibration, fault interrogation, and transmission of multiple process variables. Low-power transmitters and receivers must operate on the minimum current, 4 mA or less, depending upon the headroom required for error indication. These current loops are reliable and robust and offer high immunity to environmental interference over long communication distances. A significant disadvantage, however, is that a single loop allows only one-way communication from a sensor, or to an actuator, and can only transmit one process variable. 

The introduction of the HART standard provided a means to create “smart” transmitters, by adding digital communication capability, sharing the same twisted-pair line used for traditional 4-20 mA instrumentation. This is achieved by modulating a 1 mA peak-to-peak FSK signal on top of the 4-20 mA analog current signal, without interrupting the original primary variable transmission and still leaving headroom for operating the loop. Using this technique, HART has become a global standard for sending and receiving digital information over analog wires between smart devices and a control or monitoring system.

Inside a HART modem

The AD5700-1 is a HART modem IC that integrates the functions necessary to support this specialized communication. The function-block diagram (Figure 2) illustrates the required filtering, signal detection, modulation, demodulation, and signal generation included in a HART modem. Such integration reduces the number of external components required.

Figure 2: This diagram illustrates the required filtering, signal detection, modulation, demodulation, and signal generation included in a HART modem.

Starting with the transmit path (upper part of Figure 2), the main blocks involved in modulation are: FSK direct digital synthesis (DDS) engine, DAC (digital to analog converter), and buffer. Digital data to be transmitted arrives via the UART (universal asynchronous receiver transmitter). The modulator is enabled by bringing the /RTS (request to send) signal low. The modulator converts a bit stream of UART-encoded HART data at the TXD input, to a binary sequence of 1.2 kHz (“1”) and 2.2 kHz (“0”) tones (Figure 3). The DDS produces a stream of sinusoidal digital words at either frequency, and the DAC converts it to an approximately 493 mV peak- to-peak analog sine wave. This sinusoidal signal is internally buffered and appears at the HART_OUT pin. The DDS engine inherently generates continuous phase signals, thus avoiding any output discontinuity when switching between frequencies. A key benefit of the internal buffering on HART_OUT is the resulting high drive capability, eliminating the need for external analog buffers and the issues they imply. The HART_OUT pin, dc biased to 0.75 V, should be capacitively coupled to the load.

Figure 3: Tones for 0 and 1 are generated using a binary sequence. 0 uses 2.2 kHz, and 1 uses 1.2 kHz.

Moving on to the receive path (lower part of Figure 2), when /RTS is logic high, the modulator is disabled and the demodulator is enabled, that is, the modem is in receive mode. The receiver demodulates the FSK modulated signal on the HART_IN pin. In this mode, the relevant blocks are the internal band-pass filter, the ADC (analog to digital converter), and the DSP (digital signal processor) engine. A high on CD (carrier detect) indicates that a valid carrier is detected. The demodulated data is sent to the host processor via the RXD pin on the UART interface.

The receiving architecture makes the modem robust to noise and interferers in harsh industrial environments. A combination of analog and digital filtering results in excellent sensitivity and a highly accurate output on the RXD pin. The HART bit stream follows a standard UART frame with a start bit, 8-bit data, one parity bit, and a stop bit. In demodulation mode, the modem has two filter configuration options: an internal filter (HART signal is applied to HART_IN) and an external filter (filtered HART signal is applied to ACP_IP). The external filter mode supports the use of the modem in explosion-proof and intrinsically safe environments. A 150 kΩ resistor limits current to a sufficiently low level to comply with intrinsic safety requirements. This option is recommended for operation in safety-critical applications, where the modem must be isolated from the high voltage of the loop supply. In this case, the input has higher transient voltage protection and should, therefore, not require additional protection circuitry, even in the most demanding industrial environments.

The three remaining blocks shown in Figure 2 are the UART interface, internal reference, and oscillator. /RTS and TXD are the important signals for modulation, while CD and RXD are important for demodulation. The modem also contains a 1.5 V internal reference and associated buffer. Alternatively, an external 2.5 V reference can be used. For clocking, the device supports numerous clocking schemes to allow a simple low-cost configurable solution. The AD5700 can use an external crystal, ceramic resonator, or CMOS input. The AD5700-1 is the first HART modem IC to incorporate an internal, low-power, 0.5% accurate oscillator, reducing external circuitry and cost. Many functions integrated on-chip simplify the design of HART-compatible systems, resulting in more reliable, cost-effective, and robust networked communication.

Low-power application

Low power consumption is important because all circuitry powered by the loop must stay below 3.5 mA. Figure 4 illustrates an example of HART communication within a loop. An AD5700 HART modem is interfaced with an AD5421 16-bit, serial-input, loop-powered, 4-20 mA DAC, and an ADuCM360 microcontroller on an evaluation board. This demonstrates a loop-powered transmitter circuit for two shared data channels, measuring pressure and temperature.

Figure 4: An AD5700 HART modem is interfaced with an AD5421 16-bit, serial-input, loop-powered, 4-20 mA DAC, and an ADuCM360 microcontroller. This creates a loop-powered transmitter circuit for two shared data channels.

This circuit has been compliance tested, verified, and registered by the HART Communication Foundation. The most important constraint in such 4-20 mA loop-powered applications is staying below 3.5 mA, which is the “low alarm” setting, 0.5 mA below the 4 mA signal floor. This is where the low power specification of a modem chip like the AD5700 becomes most important. Here, every microamp counts, so if each IC in the design can individually minimize current draw, the 3.5 mA budget will not be surpassed, and the application will function as required.

Newly designed components for device transmitters, like the AD5700, integrate seamlessly with other parts of a full HART solution, including microcontroller products, amplifiers, precision references, switches, ADCs, and current-output DACs. Such effective combinations result in simplified designs, high reliability, and easy deployment of robust HART-compliant systems as the protocol continues to develop new capabilities.

Tracey Johnson is a precision DAC applications engineer for Analog Devices.

Key concepts

  • HART communication is included with most process instruments, although without a modem, it is not detectable.
  • The internal functions to create the HART signal need to operate with very low power consumption.
  • As the sophistication of the protocol grows, new chips are developing that can handle additional functions while remaining below the power consumption limit. 

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Consider this

Are you using the digital capabilities of your installed HART instrumentation?