Technology Update: Computer vision systems get help from board-level systems
Traditional computer vision systems consist of a desktop PC with a plug-in PCI Express (PCIe)-based frame grabber card. The frame grabber captures images from attached camera streams and forwards them on the PCIe bus to the PC for image processing. Frame grabbers can be found in a variety of flavors for interfacing to analog and digital cameras, with popular digital camera types, such as CameraLink, IEEE 1394; and GigE Vision.
PCIe’s multiple gigabits/second of bandwidth and deterministic behavior is particularly useful for a frame-grabber’s PC bus, with the ability to capture high-resolution and high-frame-rate image streams.
While PC-based computer vision systems are still being widely deployed, many original equipment manufacturers (OEMs) are moving to embedded computer vision systems that provide several advantages over PC-based systems in the areas of ruggedness, portability, and power consumption. The latest embedded vision systems are powered by ARM processors and digital signal processors (DSPs) that run at frequencies up to, and in some cases beyond, 1.0 GHz to enable processing of sophisticated vision algorithms.
The latest generation of embedded processors excels in processing vision algorithms and features a highly integrated peripheral set, including camera and video ports for interfacing to image sensors and video decoders. Built-in camera and video ports can serve as integrated frame grabbers, eliminating the need for a traditional PCIe-based frame grabber plug-in card in the system.
Even though a PCIe-based frame grabber plug-in card is not required, developers have found alternative applications for the PCIe interface in these new embedded vision systems. The most prevalent of these applications is in the area processor intercommunication. Many of today’s embedded vision systems are powered by two or more specialized embedded processing ICs such as:
- An ARM-based processor for running a high-level operating system (OS) like Linux, Google Android, or Microsoft Windows Embedded CE, controlling the system and providing the networking and display capabilities
- A field-programmable gate array (FPGA) for image preprocessing
- A DSP for accelerating the vision algorithms (Figure 1 shows the performance improvement that can be achieved by using a DSP to offload sample real-time image processing functions from the popular open computer vision (OpenCV) library.)
- 3D graphics processors for accelerating advanced graphical user interface (GUI) rendering.
When each of the processors in the system has a PCIe interface, a PCIe switch can be used to enable high-bandwidth, low-latency communication between them. Select PCIe switches even provide two root complex ports that allow a backup master processor, such as the ARM above, to be quickly switched into the system if the primary master processor experiences a failure. Figure 2 illustrates how the various processors in an embedded vision system can be interconnected via a PCIe switch.
Some IC vendors have even gone so far as to integrate the ARM processor, DSP, image preprocessor, and graphics processor into a single system-on-chip (SoC). An example of this is the aforementioned C6A81x C6-Integra DSP + ARM processor.
PCIe serves another important role in such highly integrated SoCs in the form of providing an expansion port, or bridge, to emerging interconnect technologies such as 10 Gigabit Ethernet, Super Speed USB (USB3), and SATA 6 Gbit/s. These PCIe bridges give the SoC access to input/output (I/O) technologies that were not mature enough to be integrated into the SoC during its development. In essence, the PCIe bus acts to future-proof the I/O capabilities of the SoC. Figure 3 illustrates how PCIe bridges can be used to expand the I/O capability of an embedded vision system.
Just as its role in computer vision systems is evolving, PCIe as a technology continues to evolve. PCIe in embedded systems today is primarily dominated by PCIe 1.x implementations, with the latest devices from major IC vendors providing PCIe 2.x implementations. In November 2010, PCI-SIG made available the specification for a PCIe 3.0 interconnect that roughly doubles the bandwidth of PCIe 2.x implementations. This increase in bandwidth will provide several important benefits for embedded vision systems that integrate PCIe 3.0.
PCIe 3.0 will enable higher throughput between individual ICs in an embedded vision system that employs multiprocessing, allowing these systems to handle even higher resolutions/frame rates and a larger number of concurrent image streams. For systems that do not necessarily require higher throughput, PCIe 3.0 will allow processers to achieve similar bandwidth to PCIe 2.0 using fewer data lanes. This can be especially helpful since today’s embedded processors are becoming increasingly pin constrained.
Finally, processors with PCIe 3.0 ports will provide embedded vision systems with an interface to bridge to the next generation of multigigabit camera communication protocols, similar in function to the PCIe-based plug-in card frame grabbers of today.
A parallel evolution of PCIe is its inclusion in the new Thunderbolt technology, developed by Intel in collaboration with Apple, which combines PCIe and DisplayPort into one cable connection from a computer. As Thunderbolt becomes more prevalent, embedded vision systems will include Thunderbolt-to-PCIe bridges to enable high-bandwidth connections to a nearby computer. This is another example of how PCIe takes on a new role in computer vision by providing a bridge between the PC world and the embedded vision world.
– Brad Cobb is system applications engineer, Texas Instruments; Edited by Mark T. Hoske, CFE Media, Control Engineering, www.controleng.com.