What’s better than a good microprocessor?
The short answer to the question, “What's better than a good microprocessor?” is “one with multiple execution cores embedded into the same-sized semiconductor package.” But you should know more. An appropriate comparison must first recognize that performance of normal, single-core (“good”) microprocessors has increased almost without limit over many generations.
The short answer to the question, “What’s better than a good microprocessor?” is “one with multiple execution cores embedded into the same-sized semiconductor package.” But you should know more.
An appropriate comparison must first recognize that performance of normal, single-core (“good”) microprocessors has increased almost without limit over many generations. At the same time, die sizes have shrunk remarkably to nanometer process levels, while incorporating nearly 2 billion transistors on one silicon chip! Ever faster processor frequencies (clock speeds) were key to obtaining these performance gains, but heat generation and power leakage became new limitations.
Multiple execution cores
Recent chip-level fabrication advances now allow placing multiple, independent execution cores (or CPUs) on a single semiconductor die—although the term “central processing unit” thereby blurs its meaning. Such multi-core processors (MCPs) enable modularization and distributed control architecture at the micro-scale. Two or more integrated cores can run at lower frequency than a single-core design and match (or exceed) the latter’s performance while using less power and generating less heat. The design intent is not to multiply single-core processor frequency.
Multiple cores allow more flexible power distribution over the chip. Functions can be modified by software to suit an application and certain circuit/core sections can be run at lower voltage or turned off temporarily; not all chip resources need to be powered simultaneously or all the time. MCP also promotes processor efficiency via improved data flow through chip circuits and allows shared resources, such as cache. MCP technology differs from adding more full processors to a module, which increases physical package size and duplicates chip resources.
With inherent capability for parallel computing, MCPs deliver several advantages. Ability to execute separate instruction sets, programs, or algorithms simultaneously—and with less memory latency—appeals to industrial system developers and designers. Multitasking is a further asset for real-time applications since a specific core can be dedicated to a critical task. However, MCPs require appropriate multi-thread software for efficient execution of multiple programs. Processor vendors and software suppliers are responding to this need.
8 cores and counting
Several manufacturers supply MCPs, including Advanced Micro Devices (AMD 64 Athlon and Opteron); Intel Corp. (Core 2 Duo, Quad-Core, etc.); and Sun Microsystems (UltraSPARC IV and T1). Dual-core chips are most numerous. However, the above vendors have (or are introducing) processors with four cores. Sun offers eight-core processors, mainly for server applications.
Development of MCPs appears to be virtually unlimited. Their architecture and fabrication processes foster innovation. For example, a replication method in silicon can efficiently generate many smaller cores capable of working independently yet sharing larger computing tasks.
Indicative of what’s ahead, Intel introduced a futuristic 80-core processor in February at the IEEE International Solid-State Circuits Conference (San Francisco). Even this “super chip”—with 1 teraflop capability (1 trillion floating-point operations/sec)—claims low power draw of just 62 W. The research prototype is not expected to be commercially available before 2011.
MCPs have been deployed in server, workstation, and desktop PC environments. They’re moving into embedded applications; serious influx into industrial automation and control also may be at hand. Developers and designers in those sectors should consider multi-core processors’ wide flexibility for compute-intensive systems. At the dual-core level, at least, there is no added cost to participate in this new technology.
Author Information |
Frank J. Bartos, P.E., is consulting editor with Control Engineering. Reach him at braunbart@sbcgloal.net . |
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