Control system for Smart Grid power electronics
National Instruments announced the NI Single-Board RIO GPIC, which provides a standard RIO architecture for smart, grid-tied power conversion systems with a comprehensive NI LabVIEW system design toolchain that significantly reduces the cost and risk of embedded system design. The high-level graphical system design platform and standard reconfigurable I/O (RIO) FPGA-based control system empower companies to in-source designs without any knowledge of register level languages (such as Verilog and VHD), according to National Instruments in the Aug. 9 announcement at its NIWeek educational and technology conference.
This product reflects ongoing investments by NI R&D to revolutionize the design, testing and large-scale deployment of new digital energy conversion systems. The new system provides a standard set of analog and digital I/O and 58 DSP cores embedded in the FPGA fabric to meet the specific control, I/O, performance and cost needs of most smart-grid power electronics applications, including dc-to-ac, ac-to-dc, dc-to-dc and ac-to-ac converters for flexible ac transmission systems, renewable energy generation, energy storage and variable speed drive applications.
“NI programming tools actually allow engineers to program the control strategy at the FPGA level, which is the clear path for the future,” said Dr. Bill Kramer, acting R&D manager for energy systems integration technology at the National Renewable Energy Laboratory. “Imagine yourself being able to write multiple control strategies that run in parallel to create new power electronics designs than can be reconfigured at the hardware level after years of deployment on the grid.”
NI Single-Board RIO GPIC features include:
– Prevalidated, deployment-ready embedded system with complete set of analog and digital I/O for rapid deployment of advanced FPGA-based power electronics control systems
– Comprehensive graphical system design toolchain with high-fidelity power electronics circuit simulator for rapid development and verification of user-defined LabVIEW FPGA control algorithms
– 58 DSP core hardware parallel Xilinx Spartan-6 FPGA that outperforms typical dual-core DSPs by a factor of 40x, 24x and 10x, with regards to performance per dollar, per chip and per watt, respectively
– Embedded 400 MHz PowerPC processor with VxWorks real-time OS supports smart-grid networking protocols DNP3, IEC 60870-5 and IEC 61850, onboard Comtrade (IEEE 37.111) data logging, and standard three-phase IEC, EN and IEEE power quality analysis
– Edited by Mark T. Hoske, content manager CFE Media, Control Engineering, Plant Engineering, and Consulting-Specifying Engineer, firstname.lastname@example.org.
NI Single-Board GPIC Overview: http://www.ni.com/gpic/
Product Page: http://sine.ni.com/nips/cds/view/p/lang/en/nid/210889/
Power Electronics Development Center: www.ni.com/powerdev